Posts

Gate Primitives

Verilog Code for MOD 6 Counter

Verilog Code for MOD 5 Counter

Verilog Code for MOD Counters

Setup Time and Hold Time

Verilog simulation in Xilinx

Neural Network: Part 2

Neural Network: Part 1

SARSA Learning with Python

Q-Learning with Python

I2C Verilog Code Explanation II